ViennaCL - The Vienna Computing Library
1.5.2
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00001 #ifndef VIENNACL_DEVICE_SPECIFIC_TREE_PARSING_READ_WRITE_HPP 00002 #define VIENNACL_DEVICE_SPECIFIC_TREE_PARSING_READ_WRITE_HPP 00003 00004 /* ========================================================================= 00005 Copyright (c) 2010-2013, Institute for Microelectronics, 00006 Institute for Analysis and Scientific Computing, 00007 TU Wien. 00008 Portions of this software are copyright by UChicago Argonne, LLC. 00009 00010 ----------------- 00011 ViennaCL - The Vienna Computing Library 00012 ----------------- 00013 00014 Project Head: Karl Rupp rupp@iue.tuwien.ac.at 00015 00016 (A list of authors and contributors can be found in the PDF manual) 00017 00018 License: MIT (X11), see file LICENSE in the base directory 00019 ============================================================================= */ 00020 00021 00022 #include <set> 00023 00024 #include "CL/cl.h" 00025 00026 #include "viennacl/forwards.h" 00027 #include "viennacl/scheduler/forwards.h" 00028 00029 #include "viennacl/device_specific/utils.hpp" 00030 #include "viennacl/device_specific/forwards.h" 00031 #include "viennacl/device_specific/mapped_objects.hpp" 00032 #include "viennacl/device_specific/tree_parsing/traverse.hpp" 00033 00034 namespace viennacl{ 00035 00036 namespace device_specific{ 00037 00038 namespace tree_parsing{ 00039 00040 class read_write_traversal : public traversal_functor{ 00041 public: 00042 enum mode_t { FETCH, WRITE_BACK }; 00043 00044 read_write_traversal(mode_t mode, unsigned int simd_width, std::string suffix, std::set<std::string> & cache, 00045 index_tuple const & index, utils::kernel_generation_stream & stream, mapping_type const & mapping) 00046 : mode_(mode), simd_width_(simd_width), suffix_(suffix), cache_(cache), index_(index), stream_(stream), mapping_(mapping){ } 00047 00048 void operator()(scheduler::statement const & /*statement*/, unsigned int root_idx, node_type leaf) const { 00049 mapping_type::const_iterator it = mapping_.find(std::make_pair(root_idx, leaf)); 00050 if(it!=mapping_.end()) 00051 { 00052 if(mode_==FETCH) 00053 { 00054 if(fetchable * p = dynamic_cast<fetchable *>(it->second.get())) 00055 p->fetch(simd_width_, suffix_, index_, cache_, stream_); 00056 } 00057 00058 if(mode_==WRITE_BACK) 00059 { 00060 if(writable * p = dynamic_cast<writable *>(it->second.get())) 00061 p->write_back(simd_width_, suffix_, index_, cache_, stream_); 00062 } 00063 } 00064 } 00065 private: 00066 mode_t mode_; 00067 unsigned int simd_width_; 00068 std::string suffix_; 00069 std::set<std::string> & cache_; 00070 index_tuple index_; 00071 utils::kernel_generation_stream & stream_; 00072 mapping_type const & mapping_; 00073 }; 00074 00075 00076 inline void read_write(read_write_traversal::mode_t mode, unsigned int simd_width, std::string const & suffix, 00077 std::set<std::string> & cache, scheduler::statement const & statement,unsigned int root_idx 00078 ,index_tuple const & index,utils::kernel_generation_stream & stream, mapping_type const & mapping, node_type leaf) 00079 { 00080 read_write_traversal traversal_functor(mode, simd_width, suffix, cache, index, stream, mapping); 00081 scheduler::statement_node const & root_node = statement.array()[root_idx]; 00082 00083 00084 if(leaf==RHS_NODE_TYPE) 00085 { 00086 if(root_node.rhs.type_family==scheduler::COMPOSITE_OPERATION_FAMILY) 00087 traverse(statement, root_node.rhs.node_index, traversal_functor, false); 00088 else 00089 traversal_functor(statement, root_idx, leaf); 00090 } 00091 else if(leaf==LHS_NODE_TYPE) 00092 { 00093 if(root_node.lhs.type_family==scheduler::COMPOSITE_OPERATION_FAMILY) 00094 traverse(statement, root_node.lhs.node_index, traversal_functor, false); 00095 else 00096 traversal_functor(statement, root_idx, leaf); 00097 } 00098 else 00099 traverse(statement, root_idx, traversal_functor, false); 00100 } 00101 00102 } 00103 } 00104 } 00105 #endif